Delhi,April 24: S. Krishnan, Secretary, Ministry of Electronics and Information Technology (MeitY), Government of India, launched two Silicon Photonics technology solutions: (a) Silicon Photonics Process Design Kit (PDK) for photonics chip manufacturing, and (b) Universal packaged PPIC (Programmable Photonic Integrated Circuit) Test Engine indigenously developed at MeitY sponsored CoE-CPPICS, IIT Madras [https://cppics.iitm.ac.in/], in presence of Amitesh Sinha, Additional Secretary, MeitY and CEO of India Semiconductor Mission (ISM), Prof Shanti Bhattacharya, HoD DoEE, IIT Madras, Governing Council Members of the centre.
The launch took place on Friday, 24th April 2026. This is a major milestone in Silicon Photonics technology sovereignty for India and will serve as a shared national facility for the Indian photonics R&D community.
Indigenously developed Silicon Photonics Process Design Kit (PDK) has over 50 verified components. This library provides essential design enablement in India for industries, startups, academic institutions, and defence R&D organisations to develop advanced Photonic ICs. Indigenously developed Universal PPIC Test Engine is a state-of-the-art automated characterisation platform for photonic and optoelectronic modules for variety of applications.
Krishnan, also launched the next phase of technology development under this centre. He congratulated the team CoE-CPPICS and commented that Silicon Photonics in India is matching with global state of the art. This needs to be complemented with establishment of Silicon Photonics Fab under India Semiconductor Mission.
Amitesh Sinha, Additional Secretary, MeitY and CEO of ISM stated that cutting edge Silicon Photonics technology developed, has applications in both classical and quantum regime. With appropriate industry partner, this kind of technology can be supported under upcoming ISM 2.0 (R&D vertical) for further technology improvements and products development. After successful demonstration of commercial capabilities, a Silicon Photonics Fab with integrated Packaging facilities may be set up.
“Starting in Q3 of this financial year, our center will enable Silicon Photonics MPW fabrication runs while offering comprehensive testing, packaging, and module characterization,” said Chief Investigator Prof. Bijoy Krishna Das. “We deeply appreciate MeitY’s steadfast support in making this possible.”
The Silicon Photonics CoE-CPPICS follows a Product Research, Development and Manufacturing (PRDM) model leveraging CMOS-compatible silicon photonics technology, with SilTerra Malaysia as foundry partner and izmo Microsystems, Bengaluru, as photonic IC packaging partner.
